Portfolio & IP

Mixed-signal intelligence for the AI edge.

From battery-less wireless sensing to custom mixed-signal ICs and MEMS-CMOS microfluidics — the projects and reusable IP taking MST from USM CEDEC research to commercial silicon.

3 Core technologies
4 Reusable IP blocks
65/16 nm process nodes
Core IP Portfolio

Reusable IP blocks

Foundational analog and power-management building blocks developed in-house . The cells our mixed-signal systems are built on.

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Selected Work

Core technology & applications

Real mixed-signal IC and sensor work spanning research to commercial silicon. Filter by discipline, and drop a chip photo on any card to feature it.

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Our Journey

From R&D to commercial silicon

A deep-tech spin-off from USM CEDEC — advancing from lab research to a commercial pathway for AI-edge silicon.

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Have a design challenge in mind?

From analog front-ends to full mixed-signal systems — let's talk about how MST can help bring your silicon to life.

Get in Touch